This invention generally relates to time stamping of events in computerized systems. In particular, the invention relates to time stamping of events in imaging systems used in medical diagnostics.
Modern medical diagnostic imaging systems typically include circuitry for acquiring image data and for transforming the data into a useable form, which is then processed to create a reconstructed image of features of interest within the patient. The image data acquisition and processing circuitry is referred to as a “scanner”, regardless of the modality, if physical or electronic scanning occurs as part of the imaging process. The particular components of the system and related circuitry, of course, differ greatly between modalities due to their different physics and data processing requirements.
Positron emission tomography (PET) is an imaging modality based on the detection of gamma ray pairs produced by annihilation of a positron and electron within the human body as a result of patient ingestion of radioactive tracers. After generation within a patient, the gamma rays move in opposite directions. A PET system is generally depicted in FIG. 1. A circular ring 102 of detectors placed around the patient detects the gamma rays. A respective ASIC (application-specific integrated circuit), comprising a respective time pick-off comparator 104 and a respective gate generator 106, processes the signal from each detector to determine the position of the event, the time at which it occurred and the energy of the event. A coincidence processor 108 receives information from all of the ASICs placed adjacent to the detectors. It then pairs up events that occurred at the same time and reconstructs the point on the patient where the gamma rays must have originated. The energy, position and time for each detected photon pair must be processed to determine a valid event and to reconstruct the image.
There are two ways of performing the time stamp operation. One method employs high-speed PLLs and the other method uses a time-to-voltage converter followed by digitizer.
A time-to-voltage converter generates a voltage proportional to the time elapsed from an event to a rising edge of a system clock. As a result of this operation, it is possible to measure the time in terms of voltage and in essence generate a time stamp corresponding to that event. This time stamp is later used when reconstructing the image, and is a necessary tool for the proper operation of the PET scanner itself.
Accuracy in time stamping an event in a PET system is a key CTQ (critical to quality) parameter. Each event has to be time stamped to an accuracy of +/−1 nsec. This typically requires complicated circuits, such as high-speed PLLs. High-speed PLLs time stamp an event with respect to a high-speed clock. In contrast, a time-to-voltage converter integrates a current on a capacitor to create a voltage proportional to the time between an event and a rising edge of a system clock.
A time-to-voltage converter having the traditional architecture is shown in FIG. 2. This time-to-voltage converter typically consists of a current source 10, a capacitor 12 and an analog-to-digital converter (ADC) 14. An event turns on the current source 10 and charges the capacitor 12 until the next rising edge of a reference clock (not shown), which turns off the current source. The time between the event and reference clock is therefore represented as a voltage on the capacitor 12.
More specifically, the time-to-voltage converter generates a voltage proportional to the time elapsed from an event to a rising edge of a system clock. The output of the time pick-off comparator causes the START switch to be closed. The current Iref is integrated on the feedback capacitor 12 (called Cint) until the next rising edge of the system clock, which closes the STOP switch and diverts the reference current to ground. The START/STOP switches are embodied as a single-pole double-throw switch 16. The voltage at the output of a time-voltage amplifier 20 is V=Iref (delta T)/Cint where delta T is the time elapsed between the onset of the event and the next rising edge. If one wants to time stamp an event to a resolution of 1 nsec with a 4 MHz system clock, one needs at least an 8-bit ADC. Assuming that the maximum voltage at the output of the amplifier 20 is 2 V, the minimum voltage generated by an event 1 nsec before a rising edge of a clock is 2 V/256=7.8 mV. A current Iref of 7.8 microamperes and a capacitance Cint of 1 pF can attain a voltage step of 7.8 mV. Process variations in Iref and Cint can be calibrated out. Even propagation delays of the comparator and the switches can be calibrated out. A typical duration of an event is 400 nsec. If an event took place just before a rising edge of a clock, then the must finish the conversion and resetting of the time-voltage amplifier 20 within 400 nsec to be ready for the next event. For simplicity of design, one can choose to convert and reset the time-voltage amplifier within 250 nsec (one 4-MHz clock cycle). If an 8-MHz ADC is assumed. this gives 125 nsec (250 nsec-125 nsec) in which to reset the time-voltage amplifier. Assuming that one needs five time constants to reset the time-voltage amplifier, this implies that the GBW of the time-voltage amplifier should be 40 MHz.
There is a remote possibility that the integrator can saturate if there are no events to be registered for a long time. One option is to monitor the output of the ADC periodically, even if there are no events registered. Based on the drift in the ADC counts, the time-voltage amplifier can be issued a reset. The probability of this happening is very low due to the fact that there are 200K events per second on every channel.
One of the problems in the time-to-voltage converter described above is that as delta T becomes smaller, the circuit becomes more nonlinear due to incomplete switch transitions. If delta T is less than the time it takes for the START switch to be fully closed, the current Iref is split between the START switch and the STOP switch. This leads to a nonlinear time to voltage transfer function. An intuitive way of arriving at the same conclusion is to imagine shrinking the width of a pulse with finite rise time and fall time. Eventually, this pulse would become a triangle and further shrinking of this triangle would lead triangles of smaller height and so on.
A similar problem occurs if an event occurred just after the rising edge of the clock. Even though the width of the pulse in this case is much larger than the rise and fall times, the transition of the clock in the digital circuit will interfere with proper operation of the switches. In general, the time-to-voltage converter is very linear if the width of the pulse is significantly larger than the rise and fall times and the event edges are not too close to the rising edge of the clock.
As can be seen from the timing diagram of the traditional time-to-voltage converter, shown in FIG. 3, there is no way to prevent this from occurring when random events are input to the system. As a result, in order to overcome the inherent nonlinearity of this system, a method of ensuring that the above conditions are not violated is required.